library ( UT_LP_AMI06 ) {

  /*=== Library Level Attributes ===*/

  /* technology family */
  technology( cmos );

  /* delay model */
  delay_model : generic_cmos;

  /* documentation details */
  date : "24 June 2004";
  comment : "Standard Cell Library";
  revision : 00;

  /* library units */
  voltage_unit : "1V";
  current_unit : "1mA";
  pulling_resistance_unit : "1kohm";
  time_unit : "1ns";
  /* represetn capacitance in terms of the standard load unit of an inverter */
  capacitive_load_unit( 0.0288, pf );

  /* nominal operating condition */
  nom_process : 1.0;
  nom_temperature : 25.0;
  nom_voltage : 5.0;

  /* Delay threshold points */
  output_threshold_pct_fall : 30 ;
  input_threshold_pct_fall : 70 ;
  output_threshold_pct_rise : 70 ;
  input_threshold_pct_rise : 30 ;

  /* Slew threshold points */
  slew_derate_from_library : 1.0;
  slew_lower_threshold_pct_fall : 10 ;
  slew_upper_threshold_pct_fall : 90 ;
  slew_lower_threshold_pct_rise : 10 ;
  slew_upper_threshold_pct_rise : 90 ;

  /* Cell swapping criteria */
  in_place_swap_mode : match_footprint;
 
  /*=== Default Attributes ===*/

  /* Fanout */
  default_fanout_load : 1.0 ;
  default_max_fanout : 20.0 ;

  /* Pin Capacitance */
  default_inout_pin_cap : 1.0 ;
  default_input_pin_cap : 1.0 ;
  default_output_pin_cap : 0.0 ;

  /* Fall and rise resistance (transition delay per unit load) */
  default_inout_pin_fall_res : 0.0 ;
  default_output_pin_fall_res : 0.0 ;
  default_inout_pin_rise_res : 0.0 ;
  default_output_pin_rise_res : 0.0 ; 

  /* Intrinsic fall and rise (propogation delay) */
  default_intrinsic_fall : 1.0 ;
  default_intrinsic_rise : 1.0 ;

  /* Slope sensitivity factor (to account for input transition) */
  default_slope_rise : 0.0 ;
  default_slope_fall : 0.0 ;

  /*=== Scaling Factors for delay calculation ===*/

  /* process scaling factors */
  k_process_pin_cap : 0.0 ;
  k_process_intrinsic_fall : 0.0 ;
  k_process_intrinsic_rise : 0.0 ;
  k_process_hold_fall : 0.0 ;
  k_process_hold_rise : 0.0 ;
  k_process_setup_fall : 0.0 ;
  k_process_setup_rise : 0.0 ;

  /* temperature scaling factors */
  k_temp_pin_cap : 0.0 ;
  k_temp_intrinsic_fall : 0.0 ;
  k_temp_intrinsic_rise : 0.0 ;
  k_temp_hold_fall : 0.0 ;
  k_temp_hold_rise : 0.0 ;
  k_temp_setup_fall : 0.0 ;
  k_temp_setup_rise : 0.0 ;

  /* voltage scaling factors */
  k_volt_pin_cap : 0.0 ;
  k_volt_intrinsic_fall : 0.0 ;
  k_volt_intrinsic_rise : 0.0 ;
  k_volt_hold_fall : 0.0 ;
  k_volt_hold_rise : 0.0 ;
  k_volt_setup_fall : 0.0 ;
  k_volt_setup_rise : 0.0 ;

  /*=== Cell Definitions ===*/
  
  /* inverter */
  cell( INV ) {

    /* cell level simple attributes */
    area : 86.4;
    cell_footprint : "inv";

    /* pin groups in the cell */
    pin( A ) {
      /* pin level simple attributes */
      direction : input;
      capacitance : 0.25;
    } /* pin( A ) */

    pin( Out ) {
      /* pin level simple attributes */
      direction : output;      
      function : "!A";

      /* timing group within the pin level */
      timing() {
	/* timing level simple attributes */
	related_pin : "A"; 
	intrinsic_rise : 0.135;
	intrinsic_fall : 0.142;
	rise_resistance : 0.421;
	fall_resistance : 0.428;
      } /* timing() */

    } /* pin( Out ) */
    
  } /* cell( INV ) */

  /* nand2 */
  cell( NAND2 ) {

    /* cell level simple attributes */
    area : 129.6;
    cell_footprint : "nand2";

    /* pin groups within the cell */
    pin( A ) {
      /* pin level simple attributes */
      direction : input;
      capacitance : 0.234;
    } /* pin( A ) */

    pin( B ) {
      /* pin level simple attributes */
      direction : input;
      capacitance : 0.234;
    } /* pin( B ) */

    pin( Out ) {
      /* pin level simple attributes */
      direction : output;
      function : "!(A&B)";

      /* timing group within the pin level */
      timing() {
	/* timing level simple attributes */
	related_pin : "A";
	intrinsic_rise : 0.153;
	intrinsic_fall : 0.183;
	rise_resistance : 0.440;
	fall_resistance : 0.739;
      } /* timing() */

      timing() {
	/* timing level simple attributes */
	related_pin : "B";
	intrinsic_rise : 0.131;
	intrinsic_fall : 0.182;
	rise_resistance : 0.417;
	fall_resistance : 0.746;
      } /* timing() */

    } /* pin( Out ) */

  } /* cell( NAND2 ) */

  /* nor2 */
  cell( NOR2 ) {

    /* cell level simple attributes */
    area : 129.6;
    cell_footprint : "nor2";

    /* pin groups within the cell */
    pin( A ) {
      /* pin level simple attributes */
      direction : input;
      capacitance : 0.25;
    } /* pin( A ) */

    pin( B ) {
      /* pin level simple attributes */
      direction : input;
      capacitance : 0.25;
    } /* pin( B ) */

    pin( Out ) {
      /* pin level simple attributes */
      direction : output;
      function : "!(A+B)";

      /* timing group within the pin level */
      timing() {
	/* timing level simple attributes */
	related_pin : "A";
	intrinsic_rise : 0.194;
	intrinsic_fall : 0.172;
	rise_resistance : 0.772;
	fall_resistance : 0.466;
      } /* timing() */

      timing() {
	/* timing level simple attributes */
	related_pin : "B";
	intrinsic_rise : 0.171;
	intrinsic_fall : 0.138;
	rise_resistance : 0.770;
	fall_resistance : 0.417;
      } /* timing() */

    } /* pin( Out ) */

  } /* cell( NOR2 ) */

  /* dffpc_s */
  cell( DFFPC_S ) {

    /* cell level simple attributes */
    area : 1166.4;
    cell_footprint : "dffpc_s";

    /* pin groups within the cell */
    pin( CLK ) {
      /* pin level simple attributes */
      direction : input;
      capacitance : 0.25;
      clock : true;
    } /* pin( CLK ) */

    pin( DATA ) {
      /* pin level simple attributes */
      direction : input;
      capacitance : 0.25;
    } /* pin( DATA ) */

    pin( PrB ) {
      /* pin level simple attributes */
      direction : input;
      capacitance : 0.5;
    } /* pin( PrB) */

    pin( CLB ) {
      /* pin level simple attributes */
      direction : input;
      capacitance : 0.59;
    } /* pin( CLB ) */

    ff( "IQ", "IQN" ) {
      next_state : "DATA";
      clocked_on : "CLK";
      clear : "CLB'";
      preset : "PrB'";
      clear_preset_var1 : H;
      clear_preset_var2 : H;
    } /* ff( "IQ", "IQN" ) */

    pin( Q ) {
      /* pin level simple attributes */
      direction : output;
      function : "IQ";

      /* timing group within pin level */
      timing() {
	/* timing level simple attributes */
	related_pin : "CLK";
	timing_type : rising_edge;
	intrinsic_rise : 0.194;
	intrinsic_fall : 0.172;
	rise_resistance : 0.772;
	fall_resistance : 0.466;
      } /* timing() */

      timing() {
	/* timing level simple attributes */
	related_pin : "CLB";
	timing_type : clear;
	timing_sense : positive_unate;
	intrinsic_rise : 0.194;
	intrinsic_fall : 0.172;
	rise_resistance : 0.772;
	fall_resistance : 0.466;
      } /* timing() */

      timing() {
	/* timing level simple attributes */
	related_pin : "PrB";
	timing_type : preset;
	timing_sense : negative_unate;
	intrinsic_rise : 0.194;
	intrinsic_fall : 0.172;
	rise_resistance : 0.772;
	fall_resistance : 0.466;
      } /* timing() */      
      
    } /* pin( Q ) */

    pin( QB ) {
      direction : output;
      function : "IQN";
      internal_node : "QB";
    }

  } /* cell( DFFPC_S ) */


} /* library ( UT_LP_AMI06 ) */