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Robotic Vision Lab
Helios Robotic Vision Platform
Helios Specifications
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Robotic Vision Lab
Helios Specifications
Physical Dimensions
6.5 x 9 cm (2.5 x 3.5")
Stacking height of 9 mm, typical
Xilinx Virtex-4 FX FPGA
Supports FX20, FX40, or FX60
One or two embedded PowerPC cores, up to 450 MHz
From 19,224 to 56,880 logic cells
From 32 to 128 DSP slices
From 1,224 to 4,126 kbits on-chip memory
SDRAM
Up to 64 MB
Up to 133 MHz, 32-bit
Low power mobile SDRAM
SRAM
Up to 8 MB
Up to 200 MHz, 32-bit
High-speed ZBT
Low power version
Flash
Up to 16 MB
Intel StrataFlash/CFI compatible
Platform Flash
8, 16, or 32 Mbit
Allows power-on configuration of FPGA
Simultaneous storage of multiple configurations
USB Interface
High-speed USB 2.0
Mini B receptacle
Low-power operation
Cypress CY7C68014A USB peripheral
Integrated 8051 microcontroller
Expansion Header
120-pin header
64 general purpose I/O pins
3.3V signalling
3.3V and 2.5V power rails
Various stacking heights available
Power Supply
Onboard 3.3V, 2.5V, and 1.2V power supplies
High-efficiency switching operation
Tolerates wide 5-24V input range
1 to 3 W typical power for FX20
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